1. Technical Field
The present invention relates to a semiconductor memory apparatus, and more particularly, to a semiconductor memory apparatus for providing an internal voltage to activated banks.
2. Related Art
In general, in order to improve the efficiency of read and write operations, semiconductor memory apparatuses perform the read and write operations with the entire cell matrix divided into a plurality of banks. In this case, the semiconductor memory apparatuses use an internal voltage which is generated such that the level of the internal voltage is kept at a constant level even if an external voltage varies.
The semiconductor memory apparatuses perform an active operation before the read and write operations. The active operation applies an elevated voltage to a word line provided in an active bank to turn on a cell transistor. When the cell transistor is turned on, data stored in a cell capacitor connected to the cell transistor is transmitted to a bit line sense amplifier (BLSA), and the bit line sense amplifier performs a sensing operation to amplify data. That is, general semiconductor memory apparatuses are provided with internal voltage generators in order to supply a power supply voltage required for the active operation, the write operation, and the read operation.
The general semiconductor memory apparatuses may have a four-bank structure. In this case, each bank includes M internal voltage generators (M is a natural number) in order to supply an internal voltage to the four banks. For example, each bank may include two internal voltage generators, that is, the four banks may include 8 internal voltage generators. In this case, when an active signal activates one bank, only two internal voltage generators are operated, which is inefficient. As a result, the efficiency of a chip per area is lowered. That is, since only two of the eight internal voltage generators are operated and the other internal voltage generators are not operated, the related art is inefficient from the viewpoint of area used.